UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 421

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

16.5 Transfer Mode
16.5.1 Single transfer mode
transfer request, transfer is performed again once. This operation continues until a terminal count occurs.
DMA request always takes precedence.
16.6 Transfer Types
16.6.1 Two-cycle transfer
(DMAC to destination).
second cycle, the destination address is output and writing is performed from the DMAC to the destination.
In single transfer mode, the DMAC releases the bus at each byte/halfword transfer. If there is a subsequent DMA
When the DMAC has released the bus, if another higher priority DMA transfer request is issued, the higher priority
In two-cycle transfer, data transfer is performed in two cycles, a read cycle (source to DMAC) and a write cycle
In the first cycle, the source address is output and reading is performed from the source to the DMAC. In the
CHAPTER 16 DMA FUNCTIONS (DMA CONTROLLER)
User’s Manual U15905EJ2V1UD
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