UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 212
UPD70F3201YGC-YEU-A
Manufacturer Part Number
UPD70F3201YGC-YEU-A
Description
MCU 32BIT I2C 100TQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Sx2r
Datasheet
1.UPD70F3201YGC-YEU-A.pdf
(555 pages)
Specifications of UPD70F3201YGC-YEU-A
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
68
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 2.7 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3201YGC-YEU-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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6.5.1
210
(1) Prescaler mode register (PRSM)
Cautions 1. Do not change the values of BGCS1 and BGCS0 during transmission/reception.
The PRSM register controls generation of the clock of the watch timer and A/D converter.
This register can be read or written in 8-bit or 1-bit units.
Control register
2. Set the PRSM register before setting the CE bit to 1.
3. Set the PRSM and PRSCM registers in accordance with the main clock frequency to be
PRSM
used, so that the frequency of f
After reset:
BGCS1
00H
CE
0
1
1
0
0
1
1
0
CHAPTER 6 CLOCK GENERATION FUNCTION
BGCS0
R/W
TODIS
0
1
0
1
X
0
0
1
Address:
f
f
f
f
X
X
X
X
Fixed to 0
Operates
Fixed to 0
User’s Manual U15905EJ2V1UD
/2
/4
/8
0
BRG
Baud rate output
FFFFF8B0H
is 32.768 kHz.
CE
Selects input clock (f
10 MHz
100 ns
200 ns
400 ns
800 ns
0
Baud rate interrupt signal (INTBRG)
Fixed to 0
Operates
Operates
TODIS
BRGS
)
BGCS1
4 MHz
250 ns
500 ns
1 s
2 s
µ
µ
BGCS0
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