UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 126

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

124
(2) Register
(3) Block diagram
Notes 1. When reading or writing bits 8 to 15 of the P7 register in 8-bit or 1-bit units, specify these bits as bits
Caution Do not read the P7 register during A/D conversion.
Remarks 1. If port 7 (P7) is read, the pin levels at that time can be read.
(a) Port register 7 (P7)
2. Bits 15 to 12 are valid only in the V850ES/SA3. These bits are undefined in the V850ES/SA2.
Port register 7 is a 16-bit register that is used to read the pin level.
This register is read-only, in 16-bit units.
If the higher 8 bits of the P7 register are used as P7H, and the lower 8 bits as P7L, however, this register
can be read in 8-bit or 1-bit units.
2. After reset, an undefined value (pin input level) is read when P7 is read.
P7 (P7H
0 to 7 of the P7H register.
After reset: Undefined
(P7L)
Note 1
)
RD
P715
P77
P7n
15
0
1
Note 2
ANI0 to ANI15 input
Figure 4-16. Block Diagram of P70 to P715
P714
Inputs low level.
Inputs high level.
Reads input data (V850ES/SA2: n = 0 to 12, V850ES/SA3: n = 0 to 15)
P76
14
Note 2
CHAPTER 4 PORT FUNCTIONS
R
User’s Manual U15905EJ2V1UD
P713
P75
Address:
13
Note 2
P712
P7 FFFFF40EH,
P7L FFFFF40EH, P7H FFFFF40FH
P74
12
Note 2
P711
P73
11
P70/ANI0 to P715/ANI15
P710
P72
10
P71
P79
9
P70
P78
8