UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 181

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

5.3
programmable wait function and bus cycle operation mode for each of these blocks can be independently controlled in
one-block units.
The 64 MB memory space is divided into memory blocks of (lower) 2 MB, 2MB, 4MB, and 8MB.
Notes 1. This area is the 4 MB space of 0800000H to 0BFFFFFH in the V850ES/SA2 (0C00000H to
Memory Block Function
3 F F F F F F H
3 F E C 0 0 0 H
3 F E B F F F H
1 0 0 0 0 0 0 H
0 F F F F F F H
0 8 0 0 0 0 0 H
0 7 F F F F F H
0 4 0 0 0 0 0 H
0 3 F F F F F H
0 2 0 0 0 0 0 H
0 1 F F F F F H
0 0 0 0 0 0 0 H
2. This area is an external memory area in the case of a data write access.
0FFFFFFH are the image of 0800000H to 0BFFFFFH).
External memory area
External memory area
External memory area
Use prohibited
(80 KB)
(8 MB)
(4 MB)
(2 MB)
(2 MB)
CHAPTER 5 BUS CONTROL FUNCTION
Note 1
Figure 5-1. Data Memory Map
User’s Manual U15905EJ2V1UD
CS3
CS2
CS1
CS0
Internal ROM area
External memory area
Internal RAM area
Internal peripheral
I/O area (4 KB)
Use prohibited
(16 KB)
(1 MB)
(1 MB)
Note 2
3 F F F F F F H
3 F F F 0 0 0 H
3 F F E F F F H
3 F F B 0 0 0 H
3 F F A F F F H
3 F E C 0 0 0 H
0 1 F F F F F H
0 1 0 0 0 0 0 H
0 0 F F F F F H
0 0 0 0 0 0 0 H
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