UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 473
UPD70F3201YGC-YEU-A
Manufacturer Part Number
UPD70F3201YGC-YEU-A
Description
MCU 32BIT I2C 100TQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Sx2r
Datasheet
1.UPD70F3201YGC-YEU-A.pdf
(555 pages)
Specifications of UPD70F3201YGC-YEU-A
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
68
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 2.7 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3201YGC-YEU-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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18.8 Control Registers
(1) Power save control register (PSC)
(2) Power save mode register (PSMR)
(3) Oscillation stabilization time selection register (OSTS)
Cautions 1. Be sure to clear bits 1 to 7 of the PSMR register to 0.
This is an 8-bit register that controls the standby function. The STP bit of this register is used to specify the
normal mode or IDLE/software STOP mode. The PSC register is a special register (refer to 3.4.8 Special
registers). Data can be written to this register only in a specific sequence so that its contents are not rewritten
by mistake due to a program hang-up.
This register can be read or written in 8-bit or 1-bit units.
This register is cleared to 00H after reset.
This is an 8-bit register that controls the operation status and clock operation in the power save mode.
This register can be read or written in 8-bit or 1-bit units.
This register is cleared to 00H after reset.
This is an 8-bit register that controls the operation status and clock operation in the power save mode.
Refer to 10.3 (1) Oscillation stabilization time selection register (OSTS).
2. The PSM bit is valid only when the STP bit of the PSC register is set to 1.
PSMR
After reset:
After reset:
PSC
00H
STP
PSM
00H
0
1
0
0
1
0
Normal mode
IDLE/software STOP mode
IDLE mode
Software STOP mode
R/W
R/W
0
0
CHAPTER 18 STANDBY FUNCTION
(valid when bit 1 (STP) of the PSC register is set to 1)
Address:
Address:
User’s Manual U15905EJ2V1UD
Specifies operation in software standby mode
0
0
FFFFF1FEH
FFFFF820H
Sets IDLE/software STOP mode
0
0
0
0
0
0
STP
< >
0
PSM
< >
0
471
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