UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 348

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UPD70F3201YGC-YEU-A

Manufacturer Part Number
UPD70F3201YGC-YEU-A
Description
MCU 32BIT I2C 100TQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Sx2r
Datasheet

Specifications of UPD70F3201YGC-YEU-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
68
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 2.7 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3201YGC-YEU-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
14.6 System Configuration Example
output (SOn).
interface, or a display controller to the V850ES/SA2 or V850ES/SA3 (n = 0 to 3 (V850ES/SA2), n = 0 to 4
(V850ES/SA3)).
achieved.
346
CSIn performs 8-bit length data transfer using three signal lines: a serial clock (SCKn), serial input (SIn), and serial
When connecting the V850ES/SA2 or V850ES/SA3 to several devices, lines for handshake are required.
Since the first communication bit can be selected as MSB or LSB, communication with various devices can be
This is effective when connecting peripheral I/O that incorporate a conventional clocked serial
Master CPU
Port (interrupt)
CHAPTER 14 CLOCKED SERIAL INTERFACE n (CSIn)
Figure 14-6. System Configuration Example of CSI
(3-wire serial I/O
SCK
Port
SO
SI
User’s Manual U15905EJ2V1UD
3-wire serial I/O)
SCK
SI
SO
Port
Port (interrupt)
Slave CPU

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