UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 230

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UPD70F3201YGC-YEU-A

Manufacturer Part Number
UPD70F3201YGC-YEU-A
Description
MCU 32BIT I2C 100TQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Sx2r
Datasheet

Specifications of UPD70F3201YGC-YEU-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
68
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 2.7 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3201YGC-YEU-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
228
(5) External pulse output
The 16-bit timer/event counter has two timer output pins (TOn).
An external pulse output (TOn) is generated when a match of the two compare registers (CCn0 and CCn1)
and the TMn register is detected.
If a match is detected when the TMn register count value and the CCn0 value are compared, the output level
of the TOn pin is set. Also, if a match is detected when the TMn register count value and the CCn1 value are
compared, the output level of the TOn pin is reset.
The output level of the TOn pin can be specified by the TMCn1 register.
Remark
Remark
TM1 register count value
ETIn
0
0
1
1
Interrupt request
Interrupt request
n = 0, 1
n = 0, 1
ENTO1 ← 1
Figure 7-8. TM1 Compare Operation Example (Set/Reset Output Mode)
(INTCC10)
(INTCC11)
ALV1 ← 1
ALVn
TO1 pin
0
1
0
1
CHAPTER 7 16-BIT TIMER/EVENT COUNTERS 0 AND 1
0
Disable
Disable
Enable
Enable
TMCE1
Count start
External Pulse Output
1
Table 7-2. TOn Output Control
CC10
User’s Manual U15905EJ2V1UD
CC11
High level
Low level
When the CCn0 register is matched: low level
When the CCn1 register is matched: high level
When the CCn0 register is matched: high level
When the CCn1 register is matched: low level
FFFFH
Overflow
OVF1
TOn Output
CC10
1
Output Level
CC11
FFFFH
Overflow
OVF1
CC10
1

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