UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 454

• Manufacturer Part Number: UPD70F3201YGC-YEU-A
• Description: MCU 32BIT I2C 100TQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Sx2r

Specifications of UPD70F3201YGC-YEU-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, EBI/EMI, I²C, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 68
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 2.2 V ~ 2.7 V
• Data Converters: A/D 12x10b; D/A 2x8b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

452
(2) Restore
Recovery from an exception trap is carried out by the DBRET instruction.
instruction, the CPU carries out the following processing and controls the address of the restored PC.
<1> Loads the restored PC and PSW from DBPC and DBPSW.
<2> Transfers control to the address indicated by the restored PC and PSW.
The following illustrates the restore processing from an exception trap.
CHAPTER 17 INTERRUPT/EXCEPTION PROCESSING FUNCTION
Figure 17-11. Restore Processing from Exception Trap
CPU processing
Figure 17-10. Exception Trap Processing
PC
PSW
Jump to address of restored PC
User’s Manual U15905EJ2V1UD
DBRET instruction
DBPC
DBPSW
PSW.NP
PSW.EP
PSW.ID
PC
Exception trap (ILGOP) occurs
Exception processing
DBPC
DBPSW
Restored PC
PSW
1
1
1
00000060H
By executing the DBRET