UPD70F3201YGC-YEU-A Renesas Electronics America, UPD70F3201YGC-YEU-A Datasheet - Page 496

no-image

UPD70F3201YGC-YEU-A

Manufacturer Part Number
UPD70F3201YGC-YEU-A
Description
MCU 32BIT I2C 100TQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Sx2r
Datasheet

Specifications of UPD70F3201YGC-YEU-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, EBI/EMI, I²C, UART/USART
Peripherals
DMA, PWM, WDT
Number Of I /o
68
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 2.7 V
Data Converters
A/D 12x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3201YGC-YEU-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
21.5.4 RESET pin
reset signal generator on-board, a conflict of signals occurs. To avoid the conflict of signals, isolate the connection to
the reset signal generator.
operation will not be performed correctly. Therefore, do not input signals other than the reset signals from the
dedicated flash programmer.
21.5.5 Port pins (including NMI)
dedicated flash programmer enter the output high-impedance status. If problems such as disabling output high-
impedance status should occur in the external devices connected to the port, connect the port pins to V
resistors.
21.5.6 Other signal pins
21.5.7 Power supply
494
When the reset signals of the dedicated flash programmer are connected to the RESET pin that is connected to the
When a reset signal is input from the user system in the flash memory programming mode, the programming
When the flash memory programming mode is set, all the port pins except the pins that communicate with the
Connect X1, X2, XT1, XT2, AV
Supply the same power (V
V850ES/SA2, V850ES/SA3
RESET
DD
, V
In the flash memory programming mode, the signal the reset signal generator
outputs conflicts with the signal the dedicated flash programmer outputs.
Therefore, isolate the signals on the reset signal generator side.
REF0
SS
Figure 21-11. Conflict of Signals (RESET Pin)
, EV
, and AV
Conflict of signals
DD
, EV
CHAPTER 21 FLASH MEMORY
User’s Manual U15905EJ2V1UD
REF1
SS
, AV
to the same status as that in the normal operation mode.
DD
, AV
Reset signal generator
SS
Dedicated flash programmer
connection pin
) as in normal operation mode.
Output pin
DD
or V
SS
via

Related parts for UPD70F3201YGC-YEU-A