R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 251

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
8.7.6
When the byte control SRAM space is specified, the RDNCR setting for the corresponding space
is invalid.
The read strobe negation timing is the same timing as when RDNn = 1 in the basic bus interface.
Note that the RD timing with respect to the DACK rising edge becomes different.
8.7.7
In the byte control SRAM interface, the extension cycles can be inserted before and after the bus
cycle in the same way as the basic bus interface. For details, see section 8.6.6, Extension of Chip
Select (CS) Assertion Period.
8.7.8
For DMAC single address transfers, the DACK signal assert timing can be modified by using the
DKC bit in BCR1.
Figure 8.27 shows the DACK signal output timing. Setting the DKC bit to 1 asserts the DACK
signal a half cycle earlier.
Read Strobe (RD)
Extension of Chip Select (CS) Assertion Period
DACK Signal Output Timing
Rev. 2.00 Sep. 16, 2009 Page 221 of 1036
Section 8 Bus Controller (BSC)
REJ09B0414-0200

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