R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 951
R0K561622S000BE
Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Specifications of R0K561622S000BE
Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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Section 24 Power-Down Modes
24.10
Sleep Instruction Exception Handling
Sleep instruction exception handling is the exception handling initiated by the execution of a
SLEEP instruction. Sleep instruction exception handling is always accepted while the program is
in execution.
When the SLPIE bit is set to 0, the execution of a SLEEP instruction does not initiate sleep
instruction exception handling. Instead, the CPU enters the power-down state. After this,
generation of an exception handling request that cancels the power-down state causes the
powerdown state to be canceled, after which the CPU starts to handle the exception. When the
SLPIE bit is set to 1, sleep instruction exception handling starts after the execution of a SLEEP
instruction. Transitions to the power-down state are inhibited when sleep instruction exception
handling is initiated, and the CPU immediately starts sleep instruction exception handling.
When a SLEEP instruction is executed while the SLPIE bit is cleared to 0, a transition is made to
the power-down state. The power-down state is canceled by a canceling factor interrupt (see figure
24.10).
When a canceling factor interrupt is generated immediately before the execution of a SLEEP
instruction, exception handling for the interrupt starts. When execution returns from the exception
service routine, the SLEEP instruction is executed to enter the power-down state. In this case, the
power-down state is not canceled until the next canceling factor interrupt is generated (see figure
24.11).
When the SLPIE bit is set to 1 in the service routine for a canceling factor interrupt so that the
execution of a SLEEP instruction will produce sleep instruction exception handling, the operation
of the system is as shown in figure 24.12. Even if a canceling factor interrupt is generated
immediately before the SLEEP instruction is executed, sleep instruction exception handling is
initiated by execution of the SLEEP instruction. Therefore, the CPU executes the instruction that
follows the SLEEP instruction after sleep instruction exception and exception service routine
without shifting to the power-down state.
When the SLPIE bit is set to 1 to start sleep exception handling, clear the SSBY bit in SBYCR to
0.
Rev. 2.00 Sep. 16, 2009 Page 921 of 1036
REJ09B0414-0200
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