R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 209

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
8.2.12
MPXCR specifies the address/data multiplexed I/O interface.
Bit
15
14
13
12
11
10 to 1 
0
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial Value
R/W
Bit Name
MPXE7
MPXE6
MPXE5
MPXE4
MPXE3
ADDEX
Address/Data Multiplexed I/O Control Register (MPXCR)
MPXE7
R/W
15
R
0
7
0
Initial
Value
0
0
0
0
0
All 0
0
MPXE6
R/W
14
R
0
6
0
R/W
R/W
R/W
R/W
R/W
R/W
R
R/W
MPXE5
R/W
13
R
0
5
0
Description
Address/Data Multiplexed I/O Interface Select
Specifies the bus interface for the corresponding area.
To set this bit to 1, clear the BCSELn bit in SRAMCR to
0.
0: Area n is specified as a basic interface or a byte
1: Area n is specified as an address/data multiplexed
(n = 7 to 3)
Reserved
These are read-only bits and cannot be modified.
Address Output Cycle Extension
Specifies whether a wait cycle is inserted for the
address output cycle of address/data multiplexed I/O
interface.
0: No wait cycle is inserted for the address output cycle
1: One wait cycle is inserted for the address output
control SRAM interface.
I/O interface
MPXE4
cycle
R/W
12
R
0
4
0
MPXE3
R/W
11
R
0
3
0
Rev. 2.00 Sep. 16, 2009 Page 179 of 1036
10
R
R
0
2
0
Section 8 Bus Controller (BSC)
R
R
9
0
1
0
REJ09B0414-0200
ADDEX
R/W
R
8
0
0
0

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