R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 600

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 14 8-Bit Timers (TMR)
Rev. 2.00 Sep. 16, 2009 Page 570 of 1036
REJ09B0414-0200
Bit
6
5
4
3
2
Bit Name
CMFA
OVF
ADTE
OS3
OS2
Initial
Value
0
0
0
0
0
R/W
R/(W)*
R/(W)*
R/W
R/W
R/W
1
1
Description
Compare Match Flag A
[Setting condition]
[Clearing conditions]
Timer Overflow Flag
[Setting condition]
When TCNT overflows from H'FF to H'00
[Clearing condition]
When writing 0 after reading OVF = 1
(When this flag is cleared by the CPU in the interrupt
handling, be sure to read the flag after writing 0 to it.)
A/D Trigger Enable*
Selects enabling or disabling of A/D converter start
requests by compare match A.
0: A/D converter start requests by compare match A are
1: A/D converter start requests by compare match A are
Output Select 3 and 2*
These bits select a method of TMO pin output when
compare match B of TCORB and TCNT occurs.
00: No change when compare match B occurs
01: 0 is output when compare match B occurs
10: 1 is output when compare match B occurs
11: Output is inverted when compare match B occurs
disabled
enabled
When TCNT matches TCORA
When writing 0 after reading CMFA = 1
(When this flag is cleared by the CPU in the interrupt
handling, be sure to read the flag after writing 0 to it.)
When the DTC is activated by a CMIA interrupt while
the DISEL bit in MRB in the DTC is 0*
(toggle output)
3
2
3

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