R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 91

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

2.8.5
• Register indirect with post-increment—@ERn+
• Register indirect with pre-decrement—@−ERn
• Register indirect with pre-increment—@+ERn
• Register indirect with post-decrement—@ERn−
using this addressing mode, data to be written is the contents of the general register after
calculating an effective address. If the same general register is specified in an instruction and two
effective addresses are calculated, the contents of the general register after the first calculation of
an effective address is used in the second calculation of an effective address.
Example 1:
MOV.W
When ER0 before execution is H'12345678, H'567A is written at H'12345678.
The operand value is the contents of a memory location which is pointed to by the contents of
an address register (ERn). ERn is specified by the register field of the instruction code. After
the memory location is accessed, 1, 2, or 4 is added to the address register contents and the
sum is stored in the address register. The value added is 1 for byte access, 2 for word access, or
4 for longword access.
The operand value is the contents of a memory location which is pointed to by the following
operation result: the value 1, 2, or 4 is subtracted from the contents of an address register
(ERn). ERn is specified by the register field of the instruction code. After that, the operand
value is stored in the address register. The value subtracted is 1 for byte access, 2 for word
access, or 4 for longword access.
The operand value is the contents of a memory location which is pointed to by the following
operation result: the value 1, 2, or 4 is added to the contents of an address register (ERn). ERn
is specified by the register field of the instruction code. After that, the operand value is stored
in the address register. The value added is 1 for byte access, 2 for word access, or 4 for
longword access.
The operand value is the contents of a memory location which is pointed to by the contents of
an address register (ERn). ERn is specified by the register field of the instruction code. After
the memory location is accessed, 1, 2, or 4 is subtracted from the address register contents and
the remainder is stored in the address register. The value subtracted is 1 for byte access, 2 for
word access, or 4 for longword access.
Register Indirect with Post-Increment, Pre-Decrement, Pre-Increment,
or Post-Decrement—@ERn+, @−ERn, @+ERn, or @ERn−
R0, @ER0+
Rev. 2.00 Sep. 16, 2009 Page 61 of 1036
REJ09B0414-0200
Section 2 CPU