R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 548

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 12 16-Bit Timer Pulse Unit (TPU)
12.10
12.10.1 Module Stop Function Setting
Operation of the TPU can be disabled or enabled using the module stop control register. The initial
setting is for operation of the TPU to be halted. Register access is enabled by clearing module stop
state. For details, see section 24, Power-Down Modes.
12.10.2 Input Clock Restrictions
The input clock pulse width must be at least 1.5 states in the case of single-edge detection, and at
least 2.5 states in the case of both-edge detection. The TPU will not operate properly with a
narrower pulse width.
In phase counting mode, the phase difference and overlap between the two input clocks must be at
least 1.5 states, and the pulse width must be at least 2.5 states. Figure 12.45 shows the input clock
conditions in phase counting mode.
Rev. 2.00 Sep. 16, 2009 Page 518 of 1036
REJ09B0414-0200
Figure 12.45 Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
Usage Notes
TCLKA
(TCLKC)
TCLKB
(TCLKD)
Note:
Phase difference, Overlap ≥ 1.5 states
Pulse width ≥ 2.5 states
Overlap
Pulse width
difference
Phase
Overlap
difference
Phase
Pulse width
Pulse width
Pulse width

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