R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 932

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 24 Power-Down Modes
24.5
24.5.1
When the SLEEP instruction is executed when the SSBY bit in SBYCR is 0, the CPU enters sleep
mode. In sleep mode, CPU operation stops but the contents of the CPU's internal registers are
retained. Other peripheral functions do not stop.
24.5.2
Sleep mode is exited by any interrupt, signals on the RES or STBY pin, and a reset caused by a
watchdog timer overflow.
• Exit from sleep mode by interrupt
• Exit from sleep mode by RES pin
• Exit from sleep mode by STBY pin
• Exit from sleep mode by reset caused by watchdog timer overflow
Rev. 2.00 Sep. 16, 2009 Page 902 of 1036
REJ09B0414-0200
When an interrupt occurs, sleep mode is exited and interrupt exception processing starts. Sleep
mode is not exited if the interrupt is disabled, or interrupts other than NMI are masked by the
CPU.
Setting the RES pin level low selects the reset state. After the stipulated reset input duration,
driving the RES pin high makes the CPU start the reset exception processing.
When the STBY pin level is driven low, a transition is made to hardware standby mode.
Sleep mode is exited by an internal reset caused by a watchdog timer overflow.
Sleep Mode
Entry to Sleep Mode
Exit from Sleep Mode

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