R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 923

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Bit
6
5
4
3 to 1
0
Bit Name
IOKEEP
RAMCUT2 0
RAMCUT1 0

RAMCUT0 1
Initial
Value
0
All 0
R/W
R/W
R/W
R/W
R/W
R/W
Module
I/O Port Retention
In deep software standby mode, the ports retain the
states that were held in software standby mode. This bit
specifies whether or not the state that has been held in
deep software standby mode is retained after exit from
deep software standby mode.
In operation in external extended mode, however, the
address bus, bus control signals (CS0, AS, RD, HWR,
and LWR), and data bus are set to the initial state upon
exit from deep software standby mode.
On-chip RAM Power Off 2
Controls the internal power supply to the on-chip RAM in
deep software standby mode. For details, see
descriptions of the RAMCUT0 bit.
On-chip RAM Power Off 1
Controls the internal power supply to the on-chip RAM in
deep software standby mode. For details, see
descriptions of the RAMCUT0 bit.
Reserved
These bits are always read as 0. The write value should
always be 0.
On-chip RAM Power Off 0
Controls the internal power supply to the on-chip RAM in
deep software standby mode, in combination with
RAMCUT2 and RAMCUT 1.
000: Power is supplied to the on-chip RAM.
111: Power is not supplied to the on-chip RAM.
Settings other than above are prohibited.
IOKEEP
0
1
Pin State
The retained port states are released
simultaneously with exit from deep
software standby mode.
The retained port states are released
when a 0 is written to this bit following exit
from deep software standby mode.
Rev. 2.00 Sep. 16, 2009 Page 893 of 1036
Section 24 Power-Down Modes
REJ09B0414-0200