R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 670

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Section 16 Serial Communication Interface (SCI)
Note: For SCI_2, the above description shows the example for the case when the ABCS bit in
16.4.3
Either an internal clock generated by the on-chip baud rate generator or an external clock input to
the SCK pin can be selected as the SCI's transfer clock, according to the setting of the C/A bit in
SMR and the CKE1 and CKE0 bits in SCR. When an external clock is input to the SCK pin, the
clock frequency should be 16 times the bit rate used.
When the SCI is operated on an internal clock, the clock can be output from the SCK pin. The
frequency of the clock output in this case is equal to the bit rate, and the phase is such that the
rising edge of the clock is in the middle of the transmit data, as shown in figure 16.4.
Rev. 2.00 Sep. 16, 2009 Page 640 of 1036
REJ09B0414-0200
SEMR_2 is cleared to 0. When the ABCS bit is set to 1, the basic clock has 8 times the
frequency of the bit rate and the received data are sampled on the fourth rising edge of the
basic clock.
Clock
SCK
TxD
Figure 16.4 Phase Relation between Output Clock and Transmit Data
0
D0
D1
D2
(Asynchronous Mode)
D3
D4
1 frame
D5
D6
D7
0/1
1
1

Related parts for R0K561622S000BE