R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 837
R0K561622S000BE
Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Specifications of R0K561622S000BE
Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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The SCI_4 is set to asynchronous mode, and the serial transmit/receive format is set to 8-bit data,
one stop bit, and no parity.
When a transition to boot mode is made, the boot program embedded in this LSI is initiated.
When the boot program is initiated, this LSI measures the low period of asynchronous serial
communication data (H'00) transmitted consecutively by the host, calculates the bit rate, and
adjusts the bit rate of the SCI_4 to match that of the host.
When bit rate adjustment is completed, this LSI transmits 1 byte of H'00 to the host as the bit
adjustment end sign. When the host receives this bit adjustment end sign normally, it transmits 1
byte of H'55 to this LSI. When reception is not executed normally, initiate boot mode again. The
bit rate may not be adjusted within the allowable range depending on the combination of the bit
rate of the host and the system clock frequency of this LSI. Therefore, the transfer bit rate of the
host and the system clock frequency of this LSI must be as shown in table 22.6.
Serial Interface Setting by Host
tool and program
Programming
Start
bit
Host
data
Figure 22.7 Automatic-Bit-Rate Adjustment Operation
Figure 22.6 System Configuration in Boot Mode
D0
Measure low period (9 bits) (data is H'00)
D1
Control command,
program data
Response
D2
D3
D4
RxD4
TxD4
Software for
analyzing
control
commands
(on-chip)
D5
Rev. 2.00 Sep. 16, 2009 Page 807 of 1036
SCI_4
D6
This LSI
D7
On-chip
memory
Section 22 Flash Memory
Flash
RAM
High period of
at least 1 bit
Stop bit
REJ09B0414-0200
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