R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 173

KIT STARTER FOR H8SX/1622

R0K561622S000BE

Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Datasheets

Specifications of R0K561622S000BE

Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
The user break controller (UBC) generates a UBC break interrupt request each time the state of
the program counter matches a specified break condition. The UBC break interrupt is a non-
maskable interrupt and is always accepted, regardless of the interrupt control mode and the state of
the interrupt mask bit of the CPU.
For each channel, the break control register (BRCR) and break address register (BAR) are used to
specify the break condition as a combination of address bits and type of bus cycle.
Four break conditions are independently specifiable on four channels, A to D.
7.1
• Number of break channels: four (channels A, B, C, and D)
• Break comparison conditions (each channel)
• After a break condition is satisfied, UBC break interrupt exception handling is executed
• Module stop state specifiable
 Address
 Bus master (CPU cycle)
 Bus cycle (instruction execution (PC break))
immediately before execution of the instruction fetched from the specified address (PC break).
Features
Section 7 User Break Controller (UBC)
Rev. 2.00 Sep. 16, 2009 Page 143 of 1036
Section 7 User Break Controller (UBC)
REJ09B0414-0200

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