R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 335

• Manufacturer Part Number: R0K561622S000BE
• Description: KIT STARTER FOR H8SX/1622
• Manufacturer: Renesas Electronics America
• Series: Renesas Starter Kits (RSK)r
• Type: MCUr

Specifications of R0K561622S000BE

• Contents: Board, Cables, CD, Debugger, Power Supply
• Silicon Manufacturer: Renesas
• Features: Coding And Debugging, E10A Emulator, RS232 Serial Connection
• Kit Contents: Board
• Silicon Family Name: H8SX/1622F
• Silicon Core Number: R5F61622N50LGV
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With/related Products: H8SX/1622
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

When a transfer starts, the transfer source address is added to the offset every time data is
transferred. The transfer data is written to the destination continuous addresses. When data 4 is
transferred meaning that the repeat size of transfers is completed, the transfer source address
returns to the transfer start address (address of data 1 on the transfer source) and a repeat size end
interrupt is requested. While this interrupt stops the transfer temporarily, the contents of DSAR are
written to the address of data 5 by the CPU (when the data access size is longword, write the data
1 address + 4). When the DTE bit in DMDR is set to 1, the transfer is resumed from the state when
the transfer is stopped. Accordingly, operations are repeated and the transfer source data is
transposed to the destination area (XY conversion).
Figure 9.20 XY Conversion Flowchart Using Offset Addition in Repeat Transfer Mode
Figure 9.20 shows a flowchart of the XY conversion.
Enable repeat escape interrupt
Set address and transfer count
Decrements transfer count
and repeat size
Receives transfer request
Set repeat transfer mode
: User operation
Transfer count = 0?
Set DTE bit to 1
Transfers data
Start
End
Yes
No
: DMAC operation
Initializes transfer source address
Set transfer source address + 4
Generates repeat size end
Repeat size = 0?
interrupt request
Rev. 2.00 Sep. 16, 2009 Page 305 of 1036
Section 9 DMA Controller (DMAC)
Yes
(Longword transfer)
No
REJ09B0414-0200