R0K561622S000BE Renesas Electronics America, R0K561622S000BE Datasheet - Page 246
R0K561622S000BE
Manufacturer Part Number
R0K561622S000BE
Description
KIT STARTER FOR H8SX/1622
Manufacturer
Renesas Electronics America
Series
Renesas Starter Kits (RSK)r
Type
MCUr
Specifications of R0K561622S000BE
Contents
Board, Cables, CD, Debugger, Power Supply
Silicon Manufacturer
Renesas
Features
Coding And Debugging, E10A Emulator, RS232 Serial Connection
Kit Contents
Board
Silicon Family Name
H8SX/1622F
Silicon Core Number
R5F61622N50LGV
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With/related Products
H8SX/1622
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
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Section 8 Bus Controller (BSC)
8.7.3
Table 8.16 shows the pins used for the byte control SRAM interface.
In the byte control SRAM interface, write strobe signals (LHWR and LLWR) are output from the
byte select strobes. The RD/WR signal is used as a write enable signal.
Table 8.16 I/O Pins for Byte Control SRAM Interface
Rev. 2.00 Sep. 16, 2009 Page 216 of 1036
REJ09B0414-0200
Pin
AS/AH
CSn
RD
RD/WR
LHWR/LUB
LLWR/LLB
WAIT
A20 to A0
D15 to D0
I/O Pins Used for Byte Control SRAM Interface
When Byte Control
SRAM is Specified
AS
CSn
RD
RD/WR
LUB
LLB
WAIT
A20 to A0
D15 to D0
Name
Address
strobe
Chip select
Read strobe
Read/write
Lower-upper
byte select
Lower-lower
byte select
Wait
Address pin
Data pin
I/O
Output
Output
Output
Output
Output
Output
Input
Output
Input/
output
Function
Strobe signal indicating that the address
output on the address bus is valid when a
basic bus interface space or byte control
SRAM space is accessed
Strobe signal indicating that area n is
selected
Output enable for the SRAM when the byte
control SRAM space is accessed
Write enable signal for the SRAM when the
byte control SRAM space is accessed
Upper byte select when the 16-bit byte
control SRAM space is accessed
Lower byte select when the 16-bit byte
control SRAM space is accessed
Wait request signal used when an external
address space is accessed
Address output pin
Data input/output pin
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