OM11077 NXP Semiconductors, OM11077 Datasheet - Page 86

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
UM10237_4
User manual
10.14 Dynamic Memory Auto-refresh Period register (EMCDynamictRFC -
10.15 Dynamic Memory Exit Self-refresh register (EMCDynamictXSR -
Table 80.
0xFFE0 804C)
The EMCDynamicTRFC register enables you to program the auto-refresh period, and
auto-refresh to active command period, tRFC. It is recommended that this register is
modified during system initialization, or when there are no current or outstanding
transactions. This can be ensured by waiting until the EMC is idle, and then entering
low-power, or disabled mode. This value is normally found in SDRAM data sheets as
tRFC, or sometimes as tRC. This register is accessed with one wait state.
Note: This register is used for all four dynamic memory chip selects. Therefore the worst
case value for all of the chip selects must be programmed.
Table 5–81
Table 81.
0xFFE0 8050)
The EMCDynamicTXSR register enables you to program the exit self-refresh to active
command time, tXSR. It is recommended that this register is modified during system
initialization, or when there are no current or outstanding transactions. This can be
ensured by waiting until the EMC is idle, and then entering low-power, or disabled mode.
This value is normally found in SDRAM data sheets as tXSR. This register is accessed
with one wait state.
Note: This register is used for all four dynamic memory chip selects. Therefore the worst
case value for all of the chip selects must be programmed.
Table 5–82
Bit
4:0
31:5
Bit
4:0
31:5
Symbol
Active to active
command
period (tRC)
-
Symbol
Auto-refresh
period and
auto-refresh to
active command
period (tRFC)
-
Dynamic Mempry Active to Active Command Period register (EMCDynamictRC -
address 0xFFE0 8048) bit description
Dynamic Memory Auto-refresh Period register (EMCDynamictRFC - address
0xFFE0 804C) bit description
shows the bit assignments for the EMCDynamicTRFC register.
shows the bit assignments for the EMCDynamicTXSR register.
Rev. 04 — 26 August 2009
Value Description
0x0 -
0x1E
0xF
Value Description
0x0 -
0x1E
0xF
-
-
Chapter 5: LPC24XX External Memory Controller (EMC)
n + 1 clock cycles. The delay is in CCLK cycles.
32 clock cycles (POR reset value).
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
n + 1 clock cycles. The delay is in CCLK cycles.
32 clock cycles (POR reset value).
Reserved, user software should not write ones to
reserved bits. The value read from a reserved bit is not
defined.
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
Value
0x1F
NA
Reset
Value
0x1F
NA