OM11077 NXP Semiconductors, OM11077 Datasheet - Page 462
OM11077
Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Specifications of OM11077
Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
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NXP Semiconductors
UM10237_4
User manual
4.17.1 Baudrate calculation
Table 412. UART1 Fractional Divider Register (U1FDR - address 0xE001 0028) bit description
This register controls the clock pre-scaler for the baud rate generation. The reset value of
the register keeps the fractional capabilities of UART1 disabled making sure that UART1
is fully software and hardware compatible with UARTs not equipped with this feature.
UART1 baudrate can be calculated as (n = 1):
Where PCLK is the peripheral clock, U1DLM and U1DLL are the standard UART1 baud
rate divider registers, and DIVADDVAL and MULVAL are UART1 fractional baudrate
generator specific parameters.
The value of MULVAL and DIVADDVAL should comply to the following conditions:
The value of the U1FDR should not be modified while transmitting/receiving data or data
may be lost or corrupted.
If the U1FDR register value does not comply to these two requests, then the fractional
divider output is undefined. If DIVADDVAL is zero then the fractional divider is disabled,
and the clock will not be divided.
UART can operate with or without using the Fractional Divider. In real-life applications it is
likely that the desired baudrate can be achieved using several different Fractional Divider
settings. The following algorithm illustrates one way of finding a set of DLM, DLL,
MULVAL, and DIVADDVAL values. Such set of parameters yields a baudrate with a
relative error of less than 1.1% from the desired one.
Bit
3:0
7:4
31:8 -
1. 1 ≤ MULVAL ≤ 15
2. 0 ≤ DIVADDVAL ≤ 14
3. DIVADDVAL< MULVAL
Function
DIVADDVAL
MULVAL
UARTn
baudrate
Value Description
0
1
NA
Rev. 04 — 26 August 2009
=
Baud-rate generation pre-scaler divisor value. If this field is
0, fractional baud-rate generator will not impact the UARTn
baudrate.
Baud-rate pre-scaler multiplier value. This field must be
greater or equal 1 for UARTn to operate properly,
regardless of whether the fractional baud-rate generator is
used or not.
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
----------------------------------------------------------------------------------------------------------------------------------
16
×
(
256
×
UnDLM
+
PCLK
UnDLL
Chapter 17: LPC24XX UART1
)
×
⎛
⎝
1
+
DivAddVal
---------------------------- -
MulVal
UM10237
© NXP B.V. 2009. All rights reserved.
⎞
⎠
462 of 792
Reset
value
0
1
0
(5)
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