OM11077 NXP Semiconductors, OM11077 Datasheet - Page 544

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
6. Register description
UM10237_4
User manual
5.3.1 Setup and hold time requirements on CS with respect to SK in Microwire
mode
In the Microwire mode, the SSP slave samples the first bit of receive data on the rising
edge of SK after CS has gone LOW. Masters that drive a free-running SK must ensure
that the CS signal has sufficient setup and hold margins with respect to the rising edge of
SK.
Figure 20–103
rising edge on which the first bit of receive data is to be sampled by the SSP slave, CS
must have a setup of at least two times the period of SK on which the SSP operates. With
respect to the SK rising edge previous to this edge, CS must have a hold of at least one
SK period.
The register offsets from the SSP controller base addresses are shown in the
Table
Fig 102. Microwire frame format (continuos transfers)
Fig 103. Microwire frame format setup and hold details
20–470.
CS
SO
SK
SI
illustrates these setup and hold time requirements. With respect to the SK
LSB
CS
SK
SI
0
MSB
Rev. 04 — 26 August 2009
output data
4 to 16 bits
LSB
MSB
t
HOLD
Chapter 20: LPC24XX SSP interface SSP0/1
= t
8 bit control
SK
t
SETUP
=2*t
SK
LSB
MSB
output data
4 to 16 bits
UM10237
© NXP B.V. 2009. All rights reserved.
LSB
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