OM11077 NXP Semiconductors, OM11077 Datasheet - Page 713

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OM11077

Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Datasheets

Specifications of OM11077

Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
NXP Semiconductors
UM10237_4
User manual
Fig 144. GPDMA block diagram
4.2.1 AHB Slave Interface
4.2.2 Control Logic and Register Bank
4.2.3 DMA Request and Response Interface
responses
Interrupts
requests
AHB BUS
DMA
DMA
DMA
example, a bidirectional port requires one stream for transmit and one for receive. The
source and destination areas can each be either a memory region or a peripheral, and
can be accessed through the AHB master.
Figure 32–144
The functions of the GPDMA are described in the following sections:
All transactions on the AHB slave programming bus of the GPDMA are 32 bit wide.
The register block stores data written, or to be read across the AHB interface.
See DMA Interface description for information on the DMA request and response
interface.
AHB slave interface
Control logic and register bank
DMA request and response interface
Channel logic and channel register bank
Interrupt request
AHB master interface
Channel hardware
DMA request priority
INTERFACE
INTERFACE
INTERRUPT
AHB SLAVE
RESPONSE
REQUEST
REQUEST
DMA
AND
shows a block diagram of the GPDMA.
Chapter 32: LPC24XX General Purpose DMA (GPDMA) controller
Rev. 04 — 26 August 2009
REGISTERS
REGISTERS
LOGIC AND
LOGIC AND
CONTROL
CHANNEL
GPDMA
INTERFACE
MASTER
AHB
AHB BUS
UM10237
© NXP B.V. 2009. All rights reserved.
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