OM11077 NXP Semiconductors, OM11077 Datasheet - Page 317

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
UM10237_4
User manual
7.16 Cursor Image registers (CRSR_IMG, RW - 0xFFE1 0800 to 0xFFE1
Each word location contains two palette entries. This means that 128 word locations are
used for the palette. When configured for little-endian byte ordering, bits [15:0] are the
lower numbered palette entry and [31:16] are the higher numbered palette entry. When
configured for big-endian byte ordering this is reversed, because bits [31:16] are the low
numbered palette entry and [15:0] are the high numbered entry.
Note: Only TFT displays use all of the palette entry bits.
The contents of the LCD_PAL register are described in
Table 274. Color Palette registers (LCD_PAL, RW - 0xFFE1 0200 to 0xFFE1 03FC)
0BFC)
The CRSR_IMG register area contains 256-word wide values which are used to define
the image or images overlaid on the display by the hardware cursor mechanism. The
image must always be stored in LBBP mode (little-endian byte, big-endian pixel) mode, as
described in Image format on page 2-19. Two bits are used to encode color and
transparency for each pixel in the cursor.
Depending on the state of bit 0 in the CRSR_CFG register (see Cursor Configuration
register description), the cursor image RAM contains either four 32x32 cursor images, or
a single 64x64 cursor image.
The two colors defined for the cursor are mapped onto values from the CRSR_PAL0 and
CRSR_PAL0 registers (see Cursor Palette register descriptions).
The contents of the CRSR_IMG register are described in
Bits
31
30:26
25:21
20:16
15
14:10
9:5
4:0
Function
I
B[4:0]
G[4:0]
R[4:0]
I
B[4:0]
G[4:0]
R[4:0]
Rev. 04 — 26 August 2009
Description
Intensity / unused bit.
Can be used as the LSB of the R, G, and B inputs to a 6:6:6 TFT
display, doubling the number of colors to 64K, where each color
has two different intensities.
Blue palette data.
Green palette data.
Red palette data.
For STN displays, only the four MSBs, bits [4:1], are used. For
monochrome displays only the red palette data is used. All of the
palette registers have the same bit fields.
Intensity / unused bit.
Can be used as the LSB of the R, G, and B inputs to a 6:6:6 TFT
display, doubling the number of colors to 64K, where each color
has two different intensities.
Blue palette data.
Green palette data.
Red palette data.
For STN displays, only the four MSBs, bits [4:1], are used. For
monochrome displays only the red palette data is used. All of the
palette registers have the same bit fields.
Chapter 12: LPC24XX LCD controller
Table
Table
12–274.
12–275.
UM10237
© NXP B.V. 2009. All rights reserved.
317 of 792
Reset
value
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0