OM11077 NXP Semiconductors, OM11077 Datasheet - Page 31

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OM11077

Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Datasheets

Specifications of OM11077

Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
NXP Semiconductors
UM10237_4
User manual
3.2 Reset
Table 27.
Reset has four sources on the LPC2400: the RESET pin, the Watchdog Reset, Power On
Reset (POR) and the Brown Out Detection circuit (BOD). The RESET pin is a Schmitt
trigger input pin. Assertion of chip Reset by any source, once the operating voltage attains
a usable level, starts the Wakeup Timer (see description in
this chapter), causing reset to remain asserted until the external Reset is de-asserted, the
oscillator is running, a fixed number of clocks have passed, and the flash controller has
completed its initialization. The reset logic is shown in
Bit Symbol
0
1
2
3
7:4 -
EXTPOLAR0 0
EXTPOLAR1 0
EXTPOLAR2 0
EXTPOLAR3 0
External Interrupt Polarity register (EXTPOLAR - address 0xE01F C14C) bit
description
Value Description
1
1
1
1
-
Rev. 04 — 26 August 2009
EINT0 is low-active or falling-edge sensitive (depending on
EXTMODE0).
EINT0 is high-active or rising-edge sensitive (depending on
EXTMODE0).
EINT1 is low-active or falling-edge sensitive (depending on
EXTMODE1).
EINT1 is high-active or rising-edge sensitive (depending on
EXTMODE1).
EINT2 is low-active or falling-edge sensitive (depending on
EXTMODE2).
EINT2 is high-active or rising-edge sensitive (depending on
EXTMODE2).
EINT3 is low-active or falling-edge sensitive (depending on
EXTMODE3).
EINT3 is high-active or rising-edge sensitive (depending on
EXTMODE3).
Reserved, user software should not write ones to reserved
bits. The value read from a reserved bit is not defined.
Chapter 3: LPC24XX System control
Figure
Section 4–5 “Wakeup timer”
3–10.
UM10237
© NXP B.V. 2009. All rights reserved.
31 of 792
Reset
value
0
0
0
0
NA
in

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