OM11077 NXP Semiconductors, OM11077 Datasheet - Page 576
OM11077
Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Specifications of OM11077
Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
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NXP Semiconductors
UM10237_4
User manual
6.3 Slave Receiver mode
In the slave receiver mode, data bytes are received from a master transmitter. To initialize
the slave receiver mode, user write the Slave Address Register (I2ADR) and write the I
Control Set Register (I2CONSET) as shown in
Table 511. I2CnCONSET used to configure Slave mode
I2EN must be set to 1 to enable the I
its own slave address or the general call address. The STA, STO and SI bits are set to 0.
After I2ADR and I2CONSET are initialized, the I
its own address or general address followed by the data direction bit. If the direction bit is
0 (W), it enters slave receiver mode. If the direction bit is 1 (R), it enters slave transmitter
mode. After the address and direction bit have been received, the SI bit is set and a valid
status code can be read from the Status Register (I2STAT). Refer to
status codes and actions.
Bit
Symbol
Value
Fig 114. A master receiver switch to master Transmitter after sending repeated START
Fig 115. Format of Slave Receiver mode
S
S
from Master to Slave
from Slave to Master
From master to slave
From slave to master
SLA
SLAVE ADDRESS
7
-
-
R
A
6
I2EN
1
Rev. 04 — 26 August 2009
DATA
“0” - write
“1” - read
(n Bytes + Acknowledge)
W
data transferred
5
STA
0
A
2
DATA
A
C function. AA bit must be set to 1 to acknowledge
4
STO
0
Chapter 22: LPC24XX I
A
DATA
Table
2
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
RS = Repeated START condition
RS
C interface waits until it is addressed by
3
SI
0
(n Bytes + Acknowledge)
22–511.
SLA
data transferred
A = Acknowledge (SDA low)
A = Not acknowledge (SDA high)
S = START condition
P = STOP condition
SLA = Slave Address
A
2
AA
1
W
DATA
A
2
C interfaces I
Table 22–527
UM10237
1
-
-
© NXP B.V. 2009. All rights reserved.
DATA
A/A
A
0
-
-
576 of 792
2
for the
C0/1/2
P/RS
P
2
C
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