OM11077 NXP Semiconductors, OM11077 Datasheet - Page 27

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OM11077

Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Datasheets

Specifications of OM11077

Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
1. Summary of system control block functions
2. Pin description
3. Register description
UM10237_4
User manual
The System Control Block includes several system features and control registers for a
number of functions that are not related to specific peripheral devices. These include:
Each type of function has its own register(s) if any are required and unneeded bits are
defined as reserved in order to allow future expansion. Unrelated functions never share
the same register addresses
Table 3–22
Table 22.
All registers, regardless of size, are on word address boundaries. Details of the registers
appear in the description of each function.
Table 23.
Pin name
EINT0
EINT1
EINT2
EINT3
RESET
Name
External interrupts
EXTINT
EXTMODE
EXTPOLAR
UM10237
Chapter 3: LPC24XX System control
Rev. 04 — 26 August 2009
Reset
Brown-Out Detection
External Interrupt Inputs
Miscellaneous System Controls and Status
Code Security vs. Debugging
Pin summary
Summary of system control registers
shows pins that are associated with system control block functions.
Description
External Interrupt Flag Register
External Interrupt Mode register
External Interrupt Polarity Register
Pin
direction
Input
Input
Input
Input
Input
Rev. 04 — 26 August 2009
Pin description
External Interrupt Input 0 - An active low/high level or
falling/rising edge general purpose interrupt input. This pin may be
used to wake up the processor from Idle or Power-down modes.
External Interrupt Input 1 - See the EINT0 description above.
External Interrupt Input 2 - See the EINT0 description above.
External Interrupt Input 3 - See the EINT0 description above.
External Reset input - A LOW on this pin resets the chip, causing
I/O ports and peripherals to take on their default states, and the
processor to begin execution at address 0x0000 0000.
Access
R/W
R/W
R/W
Reset value
0x00
0x00
0x00
[1]
© NXP B.V. 2009. All rights reserved.
User manual
Address
0xE01F C140
0xE01F C148
0xE01F C14C
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