OM11077 NXP Semiconductors, OM11077 Datasheet - Page 137

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
4. LPC2460/68 pinning information
Table 121. LPC2420/60/68 pin allocation table
CAN and Ethernet pins for LPC2460/68 only.
UM10237_4
User manual
Pin Symbol
Row A
1
5
9
13
17
Row B
1
5
9
13
17
Row C
1
5
9
13
17
Row D
1
5
9
13
17
Row E
1
P3[27]/D27/
CAP1[0]/PWM1[4]
P1[4]/ENET_TX_EN
P1[17]/ENET_MDIO
P3[20]/D20/
PWM0[5]/DSR1
P1[5]/ENET_TX_ER/
MCIPWR/PWM0[3]
P3[2]/D2
P1[1]/ENET_TXD1
P4[25]/WE
V
P2[0]/PWM1[1]/TXD1/
TRACECLK
P3[13]/D13
P3[9]/D9
V
P0[7]/I2STX_CLK/SCK1
/MAT2[1]
V
TRST
P3[11]/D11
P1[2]/ENET_TXD2/
MCICLK/PWM0[1]
P0[6]/I2SRX_SDA/
SSEL1/MAT2[0]
P2[4]/PWM1[5]/
DSR1/TRACESYNC
P0[26]/AD0[3]/
AOUT/RXD3
DD(3V3)
DD(3V3)
DD(3V3)
Pin Symbol
2
6
10
14
2
6
10
14
2
6
10
14
2
6
10
14
2
P1[3]/ENET_TXD3/
V
P1[9]/ENET_RXD0
MCICMD/PWM0[2]
P1[11]/ENET_RXD2/
MCIDAT2/PWM0[6]
-
P3[10]/D10
V
P4[29]/BLS3/
MAT2[1]/RXD3
P3[19]/D19/
PWM0[4]/DCD1
-
TDI
P3[22]/D22/
PCAP0[0]/RI1
P3[21]/D21/
PWM0[6]/DTR1
P0[9]/I2STX_SDA/
MOSI1/MAT2[3]
-
P3[28]/D28/
CAP1[1]/PWM1[5]
P0[3]/RXD0
P1[16]/ENET_MDC
P1[7]/ENET_COL/
MCIDAT1/PWM0[5]
-
TCK
SSIO
SSIO
Rev. 04 — 26 August 2009
Pin Symbol
3
7
11
15
3
7
11
15
3
7
11
15
3
7
11
15
3
P1[0]/ENET_TXD0
P1[14]/ENET_RX_ER
P4[15]/A15
P0[8]/I2STX_WS/
MISO1/MAT2[2]
-
P3[1]/D1
P4[30]/CS0
P1[6]/ENET_TX_CLK/
MCIDAT0/PWM0[4]
P4[14]/A14
-
RTCK
P1[8]/ENET_CRS_DV/
ENET_CRS
P4[28]/BLS2/
MAT2[0]/TXD3
P3[18]/D18/
PWM0[3]/CTS1
-
TDO
V
V
P2[2]/PWM1[3]/
CTS1/PIPESTAT1
-
TMS
DD(3V3)
DD(DCDC)(3V3)
Chapter 8: LPC24XX Pin configuration
Pin Symbol
4
8
12
16
4
8
12
16
4
8
12
16
4
8
12
16
4
P4[31]/CS1
P1[15]/
ENET_REF_CLK/
ENET_RX_CLK
V
P1[12]/ENET_RXD3/
MCIDAT3/PCAP0[0]
-
P3[0]/D0
P4[24]/OE
P0[4]/I2SRX_CLK/RD2/
CAP2[0]
P4[13]/A13
-
P0[2]/TXD0
P1[10]/ENET_RXD1
P0[5]/I2SRX_WS/TD2/
CAP2[1]
P4[12]/A12
-
P3[12]/D12
P3[8]/D8
V
P1[13]/ENET_RX_DV
-
P3[3]/D3
SSIO
SSCORE
UM10237
© NXP B.V. 2009. All rights reserved.
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