OM11077 NXP Semiconductors, OM11077 Datasheet - Page 560

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
UM10237_4
User manual
Fig 110. Pending command start
MCIDAT0
CmdPend
cmd state
MCICMD
MCICLK
counter
data
5.3.10 CRC Token status
5.3.9 Bus mode
Z
3
The data block counter determines the end of a data block. If the counter is zero, the
end-of-data condition is TRUE (see
0xE008 C02C)”
In wide bus mode, all four data signals (MCIDAT[3:0]) are used to transfer data, and the
CRC code is calculated separately for each data signal. While transmitting data blocks to
a card, only MCIDAT0 is used for the CRC token and busy signalling. The start bit must be
transmitted on all four data signals at the same time (during the same clock period). If the
start bit is not detected on all data signals on the same clock edge while receiving data,
the DPSM sets the start bit error flag and moves to the IDLE state.
The data path also operates in half-duplex mode, where data is either sent to a card or
received from a card. While not being transferred, MCIDAT[3:0] are in the HI-Z state.
Data on these signals is synchronous to the rising edge of the clock period.
If standard bus mode is selected the MCIDAT[3:1] outputs are always in HI-Z state and
only the MCIDAT0 output is driven LOW when data is transmitted.
Design note: If wide mode is selected, both nMCIDAT0EN and nMCIDATEN outputs are
driven low at the same time. If not, the MCIDAT[3:1] outputs are always in HI-Z state
(nMCIDATEN) is driven HIGH), and only the MCIDAT0 output is driven LOW when data is
transmitted.
The CRC token status follows each write data block, and determines whether a card has
received the data block correctly. When the token has been received, the card asserts a
busy signal by driving MCIDAT0 LOW.
Table 486. CRC token status
Token
010
101
2
Z
7
PEND
1
Z
for more information).
Description
Card has received error-free data block.
Card has detected a CRC error.
0
Z
Rev. 04 — 26 August 2009
7
Z
Section 21–6.9 “Data Control Register (MCIDataCtrl -
6
S
Table 21–486
Chapter 21: LPC24XX SD/MMC card interface
CMD
5
CMD
shows the CRC token status values.
4
6
SEND
CMD
3
CMD
UM10237
2
© NXP B.V. 2009. All rights reserved.
CMD
1
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