OM11077 NXP Semiconductors, OM11077 Datasheet - Page 461
OM11077
Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Specifications of OM11077
Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
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UM10237_4
User manual
Fig 70. Auto-baud a) mode 0 and b) mode 1 waveform
a. Mode 0 (start bit and LSB are used for auto-baud)
b. Mode 1 (only start bit is used for auto-baud)
16xbaud_rate
16xbaud_rate
U0ACR start
U1ACR start
rate counter
rate counter
UARTn RX
UARTn RX
4.17 UART1 Fractional Divider Register (U1FDR - 0xE001 0028)
The UART1 Fractional Divider Register (U1FDR) controls the clock pre-scaler for the
baud rate generation and can be read and written at the user’s discretion. This pre-scaler
takes the APB clock and generates an output clock according to the specified fractional
requirements.
Important: If the fractional divider is active (DIVADDVAL > 0) and DLM = 0, the value of
the DLL register must be 3 or greater.
start
start
16 cycles
16 cycles
bit0
bit0
bit1
bit1
start bit
start bit
Rev. 04 — 26 August 2009
bit2
bit2
'A' (0x41) or 'a' (0x61)
'A' (0x41) or 'a' (0x61)
bit3
bit3
bit4
bit4
16 cycles
bit5
bit5
bit6
bit6
LSB of 'A' or 'a'
LSB of 'A' or 'a'
bit7
bit7
Chapter 17: LPC24XX UART1
parity stop
parity stop
UM10237
© NXP B.V. 2009. All rights reserved.
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