OM11077 NXP Semiconductors, OM11077 Datasheet - Page 213

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OM11077

Manufacturer Part Number
OM11077
Description
MODULE DIMM LPC2478 ARM7
Manufacturer
NXP Semiconductors
Datasheets

Specifications of OM11077

Accessory Type
Module Card
For Use With/related Products
ARM-57TS-LPC2478
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
568-4742
NXP Semiconductors
5. Ethernet architecture
UM10237_4
User manual
Fig 26. Ethernet block diagram
interface (AHB
DMA interface
(AHB master)
register
slave)
Figure 11–26
The block diagram for the Ethernet block consists of:
ETHERNET
– Memory traffic optimized by buffering and pre-fetching.
Enhanced Ethernet features:
– Receive filtering.
– Multicast and broadcast frame support for both transmit and receive.
– Optional automatic FCS insertion (CRC) for transmit.
– Selectable automatic transmit frame padding.
– Over-length frame support for both transmit and receive allows any length frames.
– Promiscuous receive mode.
– Automatic collision backoff and frame retransmission.
– Includes power management by clock switching.
– Wake-on-LAN power management support allows system wake-up: using the
Physical interface:
– Attachment of external PHY chip through standard Media Independent Interface
– PHY register access is available via the Media Independent Interface Management
BLOCK
receive filters or a magic frame detection filter.
(MII) or standard Reduced MII (RMII) interface, software selectable.
(MIIM) interface.
shows the internal architecture of the Ethernet block.
REGISTERS
TRANSMIT
RECEIVE
HOST
DMA
DMA
Rev. 04 — 26 August 2009
TRANSMIT
TRANSMIT
CONTROL
RECEIVE
RECEIVE
BUFFER
RETRY
FILTER
FLOW
Chapter 11: LPC24XX Ethernet
MII
RMII
UM10237
© NXP B.V. 2009. All rights reserved.
MII or
RMII
MIIM
213 of 792

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