OM11077 NXP Semiconductors, OM11077 Datasheet - Page 699

• Manufacturer Part Number: OM11077
• Description: MODULE DIMM LPC2478 ARM7
• Manufacturer: NXP Semiconductors

Specifications of OM11077

• Accessory Type: Module Card
• For Use With/related Products: ARM-57TS-LPC2478
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 568-4742

NXP Semiconductors
UM10237_4
User manual
4.2.1 ISP command format
4.2.2 ISP response format
4.2.3 ISP data format
4.2.4 ISP flow control
4.2.5 ISP command abort
4.2.6 Interrupts during ISP
4.2.7 Interrupts during IAP
4.2.8 RAM used by ISP command handler
"Command Parameter_0 Parameter_1 ... Parameter_n<CR><LF>" "Data" (Data only for
Write commands).
"Return_Code<CR><LF>Response_0<CR><LF>Response_1<CR><LF> ...
Response_n<CR><LF>" "Data" (Data only for Read commands).
The data stream is in UU-encode format. The UU-encode algorithm converts 3 bytes of
binary data in to 4 bytes of printable ASCII character set. It is more efficient than Hex
format which converts 1 byte of binary data in to 2 bytes of ASCII hex. The sender should
send the check-sum after transmitting 20 UU-encoded lines. The length of any
UU-encoded line should not exceed 61 characters(bytes) i.e. it can hold 45 data bytes.
The receiver should compare it with the check-sum of the received bytes. If the
check-sum matches then the receiver should respond with "OK<CR><LF>" to continue
further transmission. If the check-sum does not match the receiver should respond with
"RESEND<CR><LF>". In response the sender should retransmit the bytes.
A description of UU-encode is available at the wotsit webpage.
A software XON/XOFF flow control scheme is used to prevent data loss due to buffer
overrun. When the data arrives rapidly, the ASCII control character DC3 (stop) is sent to
stop the flow of data. Data flow is resumed by sending the ASCII control character DC1
(start). The host should also support the same flow control scheme.
Commands can be aborted by sending the ASCII control character "ESC". This feature is
not documented as a command under "ISP Commands" section. Once the escape code is
received the ISP command handler waits for a new command.
The boot block interrupt vectors located in the boot ROM sector are active after any reset.
For details on mapping the interrupt vectors see
IAP calls can be interrupted and an adequate interrupt service routine can be executed if
interrupts are enabled. For details on how the address for an interrupt service routine will
be determined, see
ISP commands use on-chip RAM from 0x4000 0120 to 0x4000 01FF. The user could use
this area, but the contents may be lost upon reset. The ROM boot loader also uses the top
32 bytes of on-chip RAM. The stack is located at RAM top - 32. The maximum stack
usage is 256 bytes and grows downwards.
Table
Rev. 04 — 26 August 2009
Chapter 31: LPC24XX On-chip bootloader for flashless parts
2–19. The IAP code does not use or disable interrupts.
Table
2–21.
UM10237
© NXP B.V. 2009. All rights reserved.
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