MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 566

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

DMA/Messaging Unit
12.3.5
The following sections describe the outbound and inbound doorbell registers.
12.3.5.1
ODR is accessible from the PCI bus and the CSB in both host and agent modes.
ODRn fields.
Table 12-6
12-6
Offset: 0x060
Reset
Reset
31–29
28–0
Bits
W
W
R
R ODR
15
31
15
Name
ODR n Outbound doorbell n.
—
describes the ODR registers.
Doorbell Registers
ODR
Outbound Doorbell Register (ODR)
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
14
—
14
Reserved
Write 1 from the CSB to set.
Write 1 from the PCI bus to clear.
Writing 0 has no effect. (Writing a bit in this register from the CSB causes an interrupt (PCI_INTA) to be
generated.)
ODR
13
29
13
ODR
ODR
28
12
28
12
Figure 12-6. Outbound Doorbell Register (ODR)
ODR
ODR
27
11
27
11
Table 12-6. ODR Field Descriptions
ODR
ODR
26
10
26
10
ODR9 ODR8 ODR7 ODR6 ODR5 ODR4 ODR3 ODR2 ODR1 ODR0
ODR
25
25
9
ODR
24
24
All zeros
8
All zeros
Description
ODR
23
23
7
ODR
22
22
6
ODR
21
21
5
ODR
20
20
4
Figure 12-6
ODR
19
19
3
Access: User Read/Write
Freescale Semiconductor
ODR
18
18
2
shows the
ODR
17
17
1
ODR
16
16
0