MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 119
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MPC8313CZQADDC
Manufacturer Part Number
MPC8313CZQADDC
Description
Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
Manufacturer
Freescale Semiconductor
Datasheet
1.MPC8313CZQADDC.pdf
(1214 pages)
Specifications of MPC8313CZQADDC
Processor Series
MPC8313
Core
e300
Data Bus Width
16 bit
Maximum Clock Frequency
133 MHz
Program Memory Size
16 KB
Data Ram Size
16 KB
Interface Type
I2C
Mounting Style
SMD/SMT
Package / Case
PBGA
Number Of Programmable I/os
32
Number Of Timers
4
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8313CZQADDC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Freescale Semiconductor
0x0_830C–
0x0_82B0–
0x0_8388–
0x0_82A0
0x0_82A4
0x0_82A8
0x0_82FF
0x0_83FF
0x0_8298
0x0_837F
0x0_8380
0x0_8384
Offset
0x00
0x08
0x10
0x18
0x20
0x28
0x30
0x38
0x40
0x48
0x50
0x58
0x60
0x68
0x70
0x78
0x80
0x0
0x4
0x8
DMADAR3—DMA 3 destination address register
DMABCR3—DMA 3 byte count register
DMANDAR3—DMA 3 next descriptor address register
DMAGSR—DMA general status register
Reserved
PCI_CONFIG_ADDRESS
PCI_CONFIG_DATA
PCI_INT_ACK
Reserved, should be cleared
PCIPMR0—PCI power management register 0
PCIPMR1—PCI power management register 1
Reserved
POTAR0—PCI outbound translation address register 0
POBAR0—PCI outbound base address register 0
POCMR0—PCI outbound comparison mask register 0
POTAR1—PCI outbound translation address register 1
POBAR1—PCI outbound base address register 1
POCMR1—PCI outbound comparison mask register 1
POTAR2—PCI outbound translation address register 2
POBAR2—PCI outbound base address register 2
POCMR2—PCI outbound comparison mask register 2
POTAR3—PCI outbound translation address register 3
POBAR3—PCI outbound base address register 3
POCMR3—PCI outbound comparison mask register 3
POTAR4—PCI outbound translation address register 4
POBAR4—PCI outbound base address register 4
POCMR4—PCI outbound comparison mask register 4
POTAR5—PCI outbound translation address register 5
POBAR5—PCI outbound base address register 5
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Register
Table 2-2. Memory Map (continued)
PCI Software Configuration Registers
Sequencer (IOS)
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
—
W
R
R
R
0x7E4B_0001
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x00 n 0_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
0x0000_0000
Reset
—
—
—
13.3.3.27/13-41
13.3.3.28/13-42
12.3.8.5/12-13
12.3.8.6/12-14
12.3.8.7/12-14
12.3.8.8/12-15
13.3.1.1/13-13
13.3.1.2/13-14
13.3.1.3/13-15
Section/Page
11.4.1/11-3
11.4.2/11-3
11.4.3/11-4
11.4.1/11-3
11.4.2/11-3
11.4.3/11-4
11.4.1/11-3
11.4.2/11-3
11.4.3/11-4
11.4.1/11-3
11.4.2/11-3
11.4.3/11-4
11.4.1/11-3
11.4.2/11-3
11.4.3/11-4
11.4.1/11-3
11.4.2/11-3
—
—
—
Memory Map
2-15
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