MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 135

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Chapter 3
Signal Descriptions
This chapter describes the external signals of the device. It is organized into the following sections:
3.1
The signals are grouped as follows:
Figure 3-1
to the MPC8313E Integrated Processor Hardware Specifications for a pinout diagram showing pin
numbers and a listing of all the electrical and mechanical specifications.
Freescale Semiconductor
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Overview of signals and cross references for signals that serve multiple functions, including two
lists: one ordered by functional block and one alphabetical.
List of reset configuration signals
List of output signal states at reset
DDR memory interface signals
PCI interface signals
DUART interface signals
I
Serial peripheral interface signals
Ethernet management interface signals
eTSEC1 and USB interface signals
eTSEC1 and 1588 interface signals
eTSEC2 interface signals
SerDes interface signals
2
C interface signals
Signals Overview
and
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
A bar over a signal name indicates that the signal is active low, such as
IRQ_OUT (interrupt out). Active-low signals are referred to as asserted
(active) when they are low and negated when they are high. Signals that are
not active low, such as IRQ (interrupt input), are referred to as asserted when
they are high and negated when they are low.
Internal signals throughout this document are shown as lower case and in
italics. For example, sys_logic_clk is an internal signal. These are
referenced only as necessary for understanding of the external functionality
of the device.
Figure 3-2
show the external signals of the device and how the signals are grouped. Refer
NOTE
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Enhanced local bus interface signals
USB PHY signals
Global timers/USB interface signals
PIC interface signals
SPI, JTAG, PMC, configuration, system
control signals
SGMII PHY interface signals
Clock signals
3-1