MPC8313CZQADDC Freescale Semiconductor, MPC8313CZQADDC Datasheet - Page 1159

• Manufacturer Part Number: MPC8313CZQADDC
• Description: Microprocessors - MPU 8313 REV2.2 PB NO EN EXT
• Manufacturer: Freescale Semiconductor

Specifications of MPC8313CZQADDC

• Processor Series: MPC8313
• Core: e300
• Data Bus Width: 16 bit
• Maximum Clock Frequency: 133 MHz
• Program Memory Size: 16 KB
• Data Ram Size: 16 KB
• Interface Type: I2C
• Mounting Style: SMD/SMT
• Package / Case: PBGA
• Number Of Programmable I/os: 32
• Number Of Timers: 4

Appendix A
Revision History
This appendix provides a list of the major differences between revisions of the MPC8313E
PowerQUICC II Pro Integrated Processor Family Reference Manual.
A.1
Major changes to the MPC8313E PowerQUICC II Pro Integrated Processor Family Reference Manual,
from Revision 1 to Revision 2 are as follows:
Section, Page
1.1, 1-3
1.2.6.1, 1-14
Freescale Semiconductor
Changes From Revision 1 to Revision 2
MPC8313E PowerQUICC™ II Pro Integrated Processor Family Reference Manual, Rev. 2
Throughout book—Combined USB_PLL_GND0 and USB_PLL_GND1 signals
into 1 signal: USB_PLL_GND.
Throughout book—changed all instances of E
Throughout book—Added signals THERM0 and THERM1 signals.
Throughout book—Replaced register name USBGP with CONTROL.
Throughout book—Added overbars to LCSn, CAS, and RAS; and deleted
overbars from LGPLn.
Replaced text in last sub-bullet under DDR SDRAM memory controller with the
following:
Replaced the text in the section with the following:
• Designed to comply with Universal Serial Bus Revision 2.0 Specification
• Supports operation as a stand-alone USB host controller
• Supports operation as a stand-alone USB device
• Supports high-speed (480-Mbps), full-speed (12-Mbps), and low-speed
• Supports USB on-the-go mode when using an external ULPI (UTMI+ low-pin
• On-chip USB-2.0 full-/high-speed PHY with ULPI (UTMI+ low-pin interface)
— 2.5-V SSTL2 compatible I/O for DDR1, 1.8-V SSTL_18 compatible I/O
— Supports USB root hub with one downstream-facing port
— Enhanced host controller interface (EHCI) compatible
— Supports one upstream-facing port
— Supports three programmable bidirectional USB endpoints
(1.5-Mbps) operations. Low speed is only supported in host mode.
interface) PHY, which includes both device and host functionality
and serial interface
for DDR2
Changes
2
PROM to EEPROM.
A-1