SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 99

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

Interrupt Control Functions in the PSW
The Processor Status Word (PSW) is functionally divided into two parts: the lower byte
of the PSW basically represents the arithmetic status of the CPU; the upper byte of the
PSW controls the interrupt system of the C164CM and the arbitration mechanism for the
external bus interface.
Note: Pipeline effects must be considered when enabling/disabling interrupt requests
PSW
Processor Status Word
Bit
N, C, V, Z, E,
MULIP, USR0
IEN
ILVL
User’s Manual
15
via modifications of register PSW (see
14
ILVL
rwh
13
Function
CPU status flags (Described in
Define the current status of the CPU (ALU, multiplication unit).
Interrupt Enable Control Bit (globally enables/disables interrupt
requests)
0:
1:
CPU Priority Level
Defines the current priority level for the CPU
F
0
H
H
12
:
:
Interrupt requests are disabled
Interrupt requests are enabled
Highest priority level
Lowest priority level
IEN
11
rw
10
-
-
SFR (FF10
9
-
-
8
-
-
5-9
Chapter
7
H
-
-
/88
Chapter
USR
H
rw
6
0
)
4).
MUL
rwh
Interrupt and Trap Functions
IP
5
4)
rwh
E
4
rwh
Reset Value: 0000
C164CM/C164SM
Z
3
rwh
V
2
Derivatives
V1.0, 2002-02
rwh
C
1
rwh
N
0
H