SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 45
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SAF-C164SM
Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C164SM.pdf
(470 pages)
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the previous context. The number of implemented register banks (arbitrary sizes) is
limited only by the size of the available internal RAM.
Details on using, switching, and overlapping register banks are described in
PEC Source and Destination Pointers
The 16 word locations in the Internal RAM from 00’FCE0
bit-addressable section) are provided as source and destination address pointers for
data transfers on the eight PEC channels. Each channel uses a pair of pointers stored
in two subsequent word locations with the source pointer (SRCPx) on the lower and the
destination pointer (DSTPx) on the higher word address (x = 7 … 0).
Figure 3-4
Whenever a PEC data transfer is performed, the pair of source and destination pointers
(selected by the specified PEC channel number) is accessed independently of the
current DPP register contents. The locations referred to by these pointers are accessed
independently of the current DPP register contents as well. If a PEC channel is not used,
the corresponding pointer locations are available and can be used for word or byte data
storage.
For more details on the use of the source and destination pointers for PEC data transfers
see
User’s Manual
Chapter
00 FCFE H
00 FCFC
00 FCE2
00 FCE0 H
5.
Location of the PEC Pointers
H
H
PEC
Source
and
Destination
Pointers
DSTP7
SRCP7
DSTP0
SRCP0
3-7
Internal
H
RAM
to 00’FCFE
MCD03903
Memory Organization
C164CM/C164SM
00 FD00
00 FCFE
00 FCE0
00 FCDE
00 F600
00 F5FE
H
(just below the
Derivatives
H
H
H
H
H
V1.0, 2002-02
H
Chapter
22.
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