SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 197
SAF-C164SM
Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C164SM.pdf
(470 pages)
- Current page: 197 of 470
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10.1.1
The core timer T3 is configured and controlled via its bitaddressable control register
T3CON.
T3CON
Timer 3 Control Register
Bit
T3I
T3M
T3R
T3UD
T3UDE
T3OTL
1)
Timer 3 Run Bit
The timer can be started or stopped by software through bit T3R (Timer T3 Run Bit). If
T3R = ‘0’, the timer stops. Setting T3R to ‘1’ will start the timer. In gated timer mode, the
timer will run only if T3R = ‘1’ and the gate is active (high or low, as programmed).
User’s Manual
15
-
-
For the effects of bits T3UD and T3UDE, refer to the direction
14
-
-
GPT1 Core Timer T3
13
-
-
Function
Timer 3 Input Selection
Depends on the operating mode, see respective sections.
Timer 3 Mode Control (Basic Operating Mode)
000: Timer Mode
001: Counter Mode
010: Gated Timer with Gate active low
011: Gated Timer with Gate active high
100: Reserved. Do not use this combination.
101: Reserved. Do not use this combination.
110: Incremental Interface Mode
111: Reserved. Do not use this combination.
Timer 3 Run Bit
0:
1:
Timer 3 Up/Down Control
Timer 3 External Up/Down Enable
Timer 3 Output Toggle Latch
Toggles on each overflow/underflow of T3. Can be set or reset by
software.
12
-
-
Timer/Counter 3 stops
Timer/Counter 3 runs
11
-
-
OTL
rwh
10
T3
SFR (FF42
9
-
-
UDE
T3
rw
8
10-3
1)
UD T3R
T3
rw
H
7
/A1
H
rw
Table
1)
6
)
10-1.
5
General Purpose Timer Unit
T3M
rw
4
Reset Value: 0000
C164CM/C164SM
3
2
Derivatives
V1.0, 2002-02
T3I
rw
1
0
H
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