SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 335

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

18.2
When a conversion is started, the capacitances of the converter are loaded first, via the
respective analog input pin to the current analog input voltage. The time to load the
capacitances is referred to as sample time. Next, the sampled voltage is converted to a
digital value in successive steps corresponding to the resolution of the ADC. During
these phases (except for the sample time), the internal capacitances are repeatedly
charged and discharged via pins
The amount of current to be drawn from the sources for sampling and changing charges
depends on the time that each respective step takes, because the capacitors must reach
their final voltage level within the given time, at least within a certain approximation. The
maximum current, however, that a source can deliver, depends on its internal resistance.
The time required by the two sampling and converting phases during conversion can be
programmed to be within a certain range in the C164CM relative to the CPU clock. The
absolute time consumed by the different conversion steps is therefore, independent from
the general speed of the controller. This allows the A/D converter of the C164CM to be
adjusted to the properties of the system:
Fast Conversion can be achieved by programming the respective times to their
absolute possible minimum. This is preferred for scanning high frequency signals, but
the internal resistance of the analog source and analog supply must be sufficiently low.
High Internal Resistance can be achieved by programming the respective times to a
higher value, or to the possible maximum. This is preferred when using analog sources
and an analog supply with a high internal resistance in order to keep the current as low
as possible. The conversion rate in this case may be considerably lower, however.
The conversion time is programmed via the upper two bits of register ADCON. Bitfield
ADCTC (conversion time control) selects the basic conversion clock (
operation of the A/D converter. The sample time is derived from this conversion clock.
Table 18-2
t
The limit values for
and
Table 18-2
ADCON.15|14
(ADCTC)
00
01
10
11
User’s Manual
CPU
f
CPU
= 1 /
.
f
CPU
Conversion Timing Control
lists the possible combinations. The timings refer to CPU clock cycles where
ADC Conversion Timing Control
.
f
BC
A/D Converter
Basic Clock
f
f
f
f
CPU
CPU
CPU
CPU
(see data sheet) must not be exceeded when selecting ADCTC
/ 4
/ 2
/ 16
/ 8
V
AREF
f
BC
and
18-13
ADCON.13|12
(ADSTC)
00
01
10
11
V
AGND
.
Analog/Digital Converter
Sample Time
t
t
t
t
C164CM/C164SM
BC
BC
BC
BC
f
BC
8
16
32
64
), used for the
Derivatives
V1.0, 2002-02
t
S