SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 396

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SAF-C164SM

Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
RSTCON
Reset Control Register
Bit
RSTLEN
SUE
CLKCFG
1)
Note: RSTCON is write protected after the execution of EINIT unless it is released via
User’s Manual
15
RSTLEN is always valid for the next reset sequence. An initial power up reset, however, is expected to last
considerably longer than any configurable reset sequence.
CLKCFG
the unlock sequence (see
RSTCON can be accessed only via its long (mem) address.
14
rw
13
Function
Reset Length Control (duration of the next reset sequence to occur)
00:
01:
10:
11:
Software Update Enable
0:
1:
Clock Generation Mode Configuration
These pins define the clock generation mode, i.e. the mechanism by
which the internal CPU clock is generated from the externally applied
(XTAL1) input clock.
000: PLL (
001: Prescaler (
010: PLL (
011: Direct Drive (
12
1024 TCL: standard duration,
corresponds to all other derivatives without control function
2048 TCL: extended duration,
may be useful, for example, to provide additional settling for
external configuration signals at high CPU clock frequencies
Reserved
Reserved
Configuration cannot be changed via software
Software update of configuration is enabled
r-
-
11
f
f
10
2.5)
1.5)
f
-
-
Section
/ 2)
f
9
mem (F1E0
=
f
)
SUE
rw
8
20-22
21.7).
7
-
-
H
/--)
100: PLL (
101: PLL (
110: PLL (
111: PLL (
6
-
-
5
-
-
f
f
f
f
4
-
-
5)
2)
3)
4)
Reset Value: 00XX
C164CM/C164SM
3
-
-
System Reset
2
-
-
Derivatives
V1.0, 2002-02
RSTLEN
1
rw
0
1)
H

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