SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 234
SAF-C164SM
Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C164SM.pdf
(470 pages)
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Bit
SSCBM
SSCHB
SSCPH
SSCPO
SSCTEN
SSCREN
SSCPEN
SSCBEN
SSCAREN
SSCMS
SSCEN
User’s Manual
Function (Programming Mode, SSCEN = ‘0’)
SSC Data Width Selection
0:
1…15: Transfer Data Width is 2 … 16 bit (<SSCBM> + 1)
SSC Heading Control Bit
0:
1:
SSC Clock Phase Control Bit
0:
1:
SSC Clock Polarity Control Bit
0:
1:
SSC Transmit Error Enable Bit
0:
1:
SSC Receive Error Enable Bit
0:
1:
SSC Phase Error Enable Bit
0:
1:
SSC Baudrate Error Enable Bit
0:
1:
SSC Automatic Reset Enable Bit
0:
1:
SSC Master Select Bit
0:
1:
SSC Enable Bit = ‘0’
Transmission and reception disabled. Access to control bits
Reserved. Do not use this combination
Transmit/Receive LSB First
Transmit/Receive MSB First
Shift transmit data on the leading clock edge, latch on trailing edge
Latch receive data on leading clock edge, shift on trailing edge
Idle clock line is low, leading clock edge is low-to-high transition
Idle clock line is high, leading clock edge is high-to-low transition
Ignore transmit errors
Check transmit errors
Ignore receive errors
Check receive errors
Ignore phase errors
Check phase errors
Ignore baudrate errors
Check baudrate errors
No additional action upon a baudrate error
The SSC is automatically reset upon a baudrate error
Slave Mode. Operate on shift clock received via SCLK
Master Mode. Generate shift clock and output it via SCLK
12-3
High-Speed Synchronous Serial Interface
C164CM/C164SM
Derivatives
V1.0, 2002-02
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