SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 101
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SAF-C164SM
Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C164SM.pdf
(470 pages)
- Current page: 101 of 470
- Download datasheet (6Mb)
5.2
The C164CM’s Peripheral Event Controller (PEC) provides 8 PEC service channels
which move a single byte or word between two locations in segment 0 (data pages
3 … 0). This is the fastest possible interrupt response, and, in many cases is sufficient
to service the respective peripheral request (for example, serial channels, etc.). Each
channel is controlled by a dedicated PEC Channel Counter/Control register (PECCx)
and a pair of pointers for source (SRCPx) and destination (DSTPx) of the data transfer.
The PECC registers control the action performed by the respective PEC channel.
PECCx
PEC Control Reg.
Bit
COUNT
BWT
INC
Table 5-4
Register
PECC0
PECC1
PECC2
PECC3
User’s Manual
15
-
-
14
-
-
Operation of the PEC Channels
13
Function
PEC Transfer Count
Counts PEC transfers and influences the channel’s action (see
Byte / Word Transfer Selection
0:
1:
Increment Control (Modification of SRCPx or DSTPx)
0 0: Pointers are not modified
0 1: Increment DSTPx by 1 or 2 (BWT)
1 0: Increment SRCPx by 1 or 2 (BWT)
1 1: Reserved. Do not use this combination.
-
-
PEC Control Register Addresses
Address
FEC0
FEC2
FEC4
FEC6
12
-
-
Transfer a Word
Transfer a Byte
(changed to ‘10’ by hardware)
H
H
H
H
/ 60
/ 61
/ 62
/ 63
11
-
-
SFR (FECy
H
H
H
H
10
Reg. Space Register
SFR
SFR
SFR
SFR
INC
rw
9
H
BWT
rw
/6z
8
5-11
H
, see
PECC4
PECC5
PECC6
PECC7
7
Table
6
Interrupt and Trap Functions
5-4)
5
Address
FEC8
FECA
FECC
FECE
COUNT
4
rw
H
H
H
H
Reset Value: 0000
/ 64
C164CM/C164SM
/ 65
/ 66
/ 67
3
H
H
H
H
2
Reg. Space
SFR
SFR
SFR
SFR
Derivatives
V1.0, 2002-02
Table
1
5-5)
0
H
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