SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 91

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

C164CM/C164SM
Derivatives
Interrupt and Trap Functions
5
Interrupt and Trap Functions
The architecture of the C164CM supports several mechanisms for fast and flexible
response to service requests from various sources internal or external to the
microcontroller. These mechanisms include: Normal Interrupt Processing, Interrupt
Processing via the Peripheral Event Controller, Trap Functions, and External Interrupt
Processing.
Normal Interrupt Processing
The CPU temporarily suspends current program execution and branches to an interrupt
service routine to service an interrupt requesting device. Current program status (IP,
PSW, also CSP in segmentation mode) is saved on the internal system stack. A
prioritization scheme with 16 priority levels allows the user to specify the order in which
multiple interrupt requests are to be handled.
Interrupt Processing via the Peripheral Event Controller (PEC)
A faster alternative to normal software controlled interrupt processing is servicing an
interrupt requesting device with the C164CM’s integrated Peripheral Event Controller
(PEC). Triggered by an interrupt request, the PEC performs a single word or byte data
transfer between any two locations in segment 0 (data pages 0 through 3) through one
of eight programmable PEC Service Channels. During a PEC transfer, normal program
execution of the CPU is halted for only one instruction cycle. No internal program status
information needs to be saved. The same prioritization scheme is used for PEC service
as for normal interrupt processing. PEC transfers share the two highest priority levels.
Trap Functions
Trap functions are activated in response to special conditions that occur during the
execution of instructions. A trap can also be caused externally by the Non-Maskable
Interrupt pin, NMI. Several hardware trap functions are provided to handle erroneous
conditions and exceptions arising during instruction execution. Hardware traps always
have highest priority and cause immediate system reaction. The software trap function
is invoked by the TRAP instruction that generates a software interrupt for a specified
interrupt vector. For all trap types, current program status is saved on the system stack.
External Interrupt Processing
Although the C164CM does not provide dedicated interrupt pins, it allows connection of
external interrupt sources and provides several mechanisms to react to external events
including standard inputs, non-maskable interrupts, and fast external interrupts. Except
for the non-maskable interrupt and the reset input, these interrupt functions are alternate
port functions.
User’s Manual
5-1
V1.0, 2002-02