SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 291
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SAF-C164SM
Manufacturer Part Number
SAF-C164SM
Description
16-Bit CMOS Microcontroller
Manufacturer
Infineon Technologies
Datasheet
1.SAF-C164SM.pdf
(470 pages)
- Current page: 291 of 470
- Download datasheet (6Mb)
The three 16-bit capture/compare channels are driven via timer T12 and each can
control two output lines (see Port Control Logic). The offset register T12OF (full function
module only) allows shifting of the switching points of the COUT6x output line of each
channel by shifting the respective compare value.
The 10-bit compare channel is driven via timer T13 and can control one output line.
Additional control logic allows the capture/compare channel outputs to be combined with
the compare channel output or with external signals. Thus flexible and complex output
patterns can be generated automatically, with very little or no CPU action.
Figure 17-2 CAPCOM6 Block Diagram
Two basic operating modes are supported:
• Edge-Aligned Mode
• Center-Aligned Mode
In Edge Aligned Mode the compare timer counts up starting at 0000
the period value stored in register TxP the timer is cleared and repeats counting up. At
this time the output signals are also switched to their passive state. Edge aligned mode
is supported by both compare timers, T12 and T13.
User’s Manual
1)
f
f
CPU
CPU
These registers are not directly accessable.
The period and offset registers are loading a value into the timer registers.
Period Register
Period Register
Control Register
Offset Register
Timer T12
Timer T13
Compare
Compare
T12P
T13P
CTCON
T12OF
16-Bit
10-Bit
Select Register
Compare Register
CC6MSEL
CC Channel 0
CC Channel 1
CC Channel 2
Mode
CMP13
CC60
CC61
CC62
17-2
Capture/Compare Unit CAPCOM6
Trap Register
CC6MCON.H
Commutation
Control
Control
Logic
Block
Port
C164CM/C164SM
H
. Upon reaching
CC6POS0
CC6POS1
CC6POS2
Derivatives
CTRAP
CC60
COUT60
CC61
COUT61
CC62
COUT62
COUT63
MCB04109
V1.0, 2002-02
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