SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 424

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

The save sequence shown above and the restore sequence after COPYL are only
required if the current routine could have interrupted a previous routine which contained
a MUL or DIV instruction. Register MDC is also saved because it is possible that a
previous routine’s Multiply or Divide instruction was interrupted while in progress. In this
case, the information required to restart the instruction is contained in this register.
Register MDC must be cleared to be correctly initialized for a subsequent multiplication
or division. The old MDC contents must be popped from the stack before the RETI
instruction is executed.
For division, the user must first move the dividend into the MD register. If a 16/16-bit
division is specified, only the low portion of register MD must be loaded. The result is also
stored into register MD. The low portion (MDL) contains the integer result of the division,
while the high portion (MDH) contains the remainder.
The following instruction sequence performs a 32 by 16-bit division:
MOV
MOV
DIV
JMPR
MOV
MOV
Whenever a multiply or divide instruction is interrupted while in progress, the address of
the interrupted instruction is pushed onto the stack and the MULIP flag in the PSW of the
interrupting routine is set. When the interrupt routine is exited with the RETI instruction,
this bit is implicitly tested before the old PSW is popped from the stack. If MULIP = ‘1’
the multiply/divide instruction is re-read from the location popped from the stack (return
address) and will be completed after the RETI instruction has been executed.
Note: The MULIP flag is part of the context of the interrupted task. When the
BCD Calculations
No direct support for BCD calculations is provided in the C164CM. BCD calculations are
performed by converting BCD data to binary data, performing the desired calculations
using standard data types, and converting the result back to BCD data. Due to the
enhanced performance of division instructions, binary data is quickly converted to BCD
data through division by 10
multiple bit shift instructions. This provides similar performance compared to instructions
directly supporting BCD data types without requiring additional hardware.
User’s Manual
interrupting routine does not return to the interrupted task (for example, scheduler
switches to another task) the MULIP flag must be set or cleared according to the
context of the task to be executed next.
MDH, R1
MDL, R2
R3
cc_V, ERROR ;Test for divide overflow
R3, MDH
R4, MDL
D
;Move dividend to MD register. Sets MDRIU
;Move low portion to MD
;Divide 32/16 signed, R3 holds divisor
;Move remainder to R3
;Move integer result to R4. Clears MDRIU
. Conversion from BCD data to binary data is enhanced by
22-3
System Programming
C164CM/C164SM
Derivatives
V1.0, 2002-02