SAF-C164SM Infineon Technologies, SAF-C164SM Datasheet - Page 22

• Manufacturer Part Number: SAF-C164SM
• Description: 16-Bit CMOS Microcontroller
• Manufacturer: Infineon Technologies

C164CM/C164SM
Derivatives
Architectural Overview
High Function 8-bit and 16-bit Arithmetic and Logic Unit
All standard arithmetic and logical operations are performed in a 16-bit ALU. Additionally,
for byte operations, signals are provided from bits 6 and 7 of the ALU result to set the
condition flags correctly. Multiple precision arithmetic is provided through a ‘CARRY-IN’
signal to the ALU from previously calculated portions of the desired operation.
Most internal execution blocks have been optimized to perform operations on either 8-bit
or 16-bit quantities. Once the pipeline has been filled, one instruction is completed per
machine cycle, except for multiply and divide. An advanced Booth algorithm has been
incorporated to allow four bits to be multiplied and two bits to be divided per machine
cycle. Thus, these operations use two coupled 16-bit registers, MDL and MDH, and
require four and nine machine cycles, respectively, to perform a 16-bit by 16-bit (or 32-bit
by 16-bit) calculation plus one machine cycle to setup and adjust the operands and the
result. Even these longer multiply and divide instructions can be interrupted during their
execution to allow for very fast interrupt response. Instructions have been provided as
well to allow byte packing in memory while providing sign extension of bytes for word
wide arithmetic operations. The internal bus structure also allows transfers of bytes or
words to or from peripherals based on the peripheral requirements.
A set of consistent flags is updated automatically in the PSW after each arithmetic,
logical, shift, or movement operation. These flags allow branching on specific conditions.
Support for both signed and unsigned arithmetic is provided through user-specifiable
branch tests. These flags are also preserved automatically by the CPU upon entry into
an interrupt or trap routine.
All targets for branch calculations are also computed in the central ALU.
A 16-bit barrel shifter provides multiple bit shifts in a single cycle. Rotates and arithmetic
shifts are also supported.
Extended Bit Processing and Peripheral Control
A large number of instructions has been dedicated to bit processing. These instructions
provide efficient control and testing of peripherals while enhancing data manipulation.
Unlike other microcontrollers, these instructions provide direct access to two operands
in the bit-addressable space without requiring them to be moved into temporary flags.
The same logical instructions available for words and bytes are also supported for bits.
This allows the user to compare and modify a control bit for a peripheral in one
instruction. Multiple bit shift instructions have been included to avoid long instruction
streams of single bit shift operations. These instructions are also performed in a single
machine cycle.
Bit field instructions have been provided as well to allow the modification of multiple bits
from one operand in a single instruction.
User’s Manual
2-5
V1.0, 2002-02